Siemens has launched an artificial intelligence-powered library characterisation tool aimed at cutting one of semiconductor design’s most time-consuming stages from weeks to days, as chip developers grapple with larger datasets, tighter process margins and rising pressure to deliver complex devices faster.The new Solido Characterizer software, introduced by Siemens Digital Industries Software in Plano, Texas, is designed for foundries and in-house semiconductor design teams generating SPICE-based Liberty files, the timing, power and variation models used across chip implementation and verification flows. The tool forms part of the Solido Characterization Suite and is positioned as a response to the growing burden created by advanced process nodes, multi-voltage designs, larger process-voltage-temperature corner sets and Liberty Variation Format requirements.
Siemens says the platform delivers up to seven times greater throughput by combining a predictive AI engine with Solido LibSPICE, a purpose-built library IP simulator. The AI engine is intended to accelerate Liberty generation for multi-PVT and LVF workflows by up to five times, while LibSPICE adds a further performance gain of more than two times. The combined approach is designed to help engineering teams move signoff-ready libraries through the development pipeline without sacrificing SPICE correlation accuracy.
Library characterisation has become a growing constraint in chip development because every standard cell, memory bit-cell, IO and custom cell must be modelled across operating conditions before downstream tools can reliably optimise performance, power and area. As designs move into more advanced nodes and larger system-on-chip platforms, the number of characterisation runs can expand sharply, increasing compute demand and stretching project schedules.
Solido Characterizer is also linked with Solido Analytics, giving engineers real-time quality assurance, resource monitoring, interactive debugging and automated rerun capabilities. That integration is intended to reduce manual intervention in a workflow where failed runs, inconsistent corners and data-format errors can slow library delivery. The tool can also work with Solido Generator, which uses baseline Liberty files to train AI models that generate additional library views without repeated SPICE simulation.
Amit Gupta, chief AI strategy officer, senior vice-president and general manager at Siemens EDA, said AI was redefining what could be achieved across semiconductor design and called characterisation one of the most transformative opportunities. He said Solido Characterizer changes the economics of library development by enabling higher speed and precision across process nodes.
The launch places Siemens more firmly in the competitive race to embed AI into electronic design automation. Cadence has been pushing agentic AI into system-on-chip implementation through its Cerebrus AI Studio, while Synopsys has expanded AI-assisted design and simulation workflows across its silicon-to-systems portfolio. Nvidia’s investment in Synopsys and related AI engineering partnerships have further underscored how chip design software is becoming a strategic layer in the broader AI infrastructure market.
Siemens’ move is narrower but technically significant because library characterisation sits deep in the design flow and affects multiple downstream stages. Faster. lib generation can shorten schedule risk for customers developing AI accelerators, automotive chips, radio-frequency devices, advanced sensors and mixed-signal designs, especially where foundry-qualified models and production-grade accuracy remain essential.
The company has also tied Solido Characterizer to Solido Fuse, its EDA AI system, to support generative and agentic AI workflows across characterisation tasks. That could allow engineers to use more automated assistance for debugging, rule generation, log analysis and workflow optimisation, though adoption will depend on how reliably such systems handle corner cases in production design environments.
Customer validation remains a central test for the product. GlobalFoundries has indicated that its use of Solido Characterization Suite helped validate design margins and create high-quality. libs, with Characterizer enabling production accuracy correlated to SPICE models while improving internal flow speed by 20 to 30 per cent. Anatrix, a specialist in radiation-hardened digital gate libraries, has also cited Siemens’ EDA flow as a factor supporting efficient characterisation and confidence in post-layout simulation results.
The commercial context is favourable for AI-assisted EDA tools. Advanced chips now require larger design teams, heavier simulation workloads and closer links between semiconductor design, packaging, thermal modelling and system-level verification. At the same time, chipmakers face pressure to reduce tape-out delays because mask costs at leading nodes are high and missed market windows can be costly in AI, automotive and communications markets.
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